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Design of Reusable VHDL Component Using External Functions
Volume 9, Issue 4 (1998), pp. 491–506
Vytautas Štuikys  

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https://doi.org/10.3233/INF-1998-9409
Pub. online: 1 January 1998      Type: Research Article     

Received
1 February 1998
Published
1 January 1998

Abstract

This paper describes a method how to represent and build a reusable VHDL component. By that component we can, for example, describe a family of the relative VHDL models. To represent the component, we use external functions as a mechanism to support a pre-processing and perform the instantiation of the component. A user interface, the constituent of the reusable component, serves for transferring parameters for the instantiation. We deliver a formal syntax of the functions and examples of their semantics. We describe the design of the reusable component as a procedure of transferring of: a) the intrinsic characteristics for a given family of domain objects and b) features from a given VHDL model(s). Those features require to be re-coded and extended with new ones by means of the external functions introduced. To test a reusable component, we use pre-processing and modelling.

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Keywords
reusable component template VHDL model pre-processing external functions

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INFORMATICA

  • Online ISSN: 1822-8844
  • Print ISSN: 0868-4952
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