<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE article PUBLIC "-//NLM//DTD JATS (Z39.96) Journal Publishing DTD v1.0 20120330//EN" "JATS-journalpublishing1.dtd"><article xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" article-type="research-article"><front><journal-meta><journal-id journal-id-type="publisher-id">INFORMATICA</journal-id><journal-title-group><journal-title>Informatica</journal-title></journal-title-group><issn pub-type="epub">0868-4952</issn><issn pub-type="ppub">0868-4952</issn><publisher><publisher-name>VU</publisher-name></publisher></journal-meta><article-meta><article-id pub-id-type="publisher-id">INF7305</article-id><article-id pub-id-type="doi">10.3233/INF-1996-7305</article-id><article-categories><subj-group subj-group-type="heading"><subject>Research article</subject></subj-group></article-categories><title-group><article-title>Performance driven placement using tabu search</article-title></title-group><contrib-group><contrib contrib-type="Author"><name><surname>Lim</surname><given-names>Andrew</given-names></name><xref ref-type="aff" rid="j_INFORMATICA_aff_000"/></contrib><aff id="j_INFORMATICA_aff_000">Information Technology Institute, 11 Science Park Road, Singapore 0511, Republic of Singapore</aff></contrib-group><pub-date pub-type="epub"><day>01</day><month>01</month><year>1996</year></pub-date><volume>7</volume><issue>3</issue><fpage>349</fpage><lpage>360</lpage><abstract><p>In this paper, we present an effective performance driven placement with global routing algorithm for macro cells. Our algorithm uses a hierarchical, divide and conquer, quad-partitioning approach. The quad-partitioning routine uses the Tabu Search technique. Our algorithm uses the concept of proximity of regions to approximate the interconnection delays during the placement process. In addition, our algorithm can handle modules whose positions are fixed or are restricted to a particular subregion on the layout frame. Our experimental results indicate the superiority of our placement method in terms of quality of solution and run time when compared to Lin and Du (1990).</p></abstract><kwd-group><label>Keywords</label><kwd>CAD</kwd><kwd>VLSI</kwd><kwd>module placement</kwd><kwd>global routing</kwd><kwd>interconnection delay</kwd><kwd>quad-partitioning</kwd><kwd>tabu search</kwd></kwd-group></article-meta></front></article>